The workflow of Orinoco is as follows: First the initial specification is instrumented by Orinoco. The modified sources are then compiled by an arbitrary C++ compiler and afterwards simulated in the real application context, i.e. with real-life data. Simulating instrumented C sources means to simply execute the compiled source code to obtain switching information. The simulation results are read in by Orinoco and a control/data flow representation of the design is built. Note that this internal representation is still not specific to any architectural implementation. The user may now navigate through the design space by providing constraints. Orinoco responds by scheduling the design and estimating the range of power dissipation for the remaining degrees of freedom as well as suggesting an architecture. Different estimation runs can be made without the need of resimulation thus enabling an effective design space exploration with short feedback loops.

In order to increase quality and provide the low power tool suite to a broad audience, in June 2002 ChipVision Design Systems has been founded, where our power estimation and optimisation tools, like Orinoco DALE, are now developed and improved. The tool suite still benefits from new ideas and methodologies developed in our low power research group.

Detailed information on the current capabilities of Orinoco or any further information can be found at http://www.chipvision.com.

<< BACK

1 |  2 |  3 |  4

NEXT >>