Welcome
to the home page of the Low Power Design and Services Group
of the OFFIS Research Institute!

---

Our field...
Recent years have brought an enormous increase in integration of circuit elements on a single chip. This trend is still holding on and the first one billion transistor chip is expected by the year 2008 (source: SIA). This trend however of performing more and more computations on less and less space in less and less time comes with enormous physical challenges. One of these challenges is the power dissipation. There are several critical aspects about power dissipation: first of all the power has to be supplied. High power consumption means high power costs and short battery life-time of mobile applications.
Another issue is the reliability and life-time of circuits which are reduced by high power consumption. Last but not least packaging and cooling increase with dissipated power. Consequently power dissipation is an important part of the cost function of modern designs and does sometimes even effect feasibility. We expect this situation to become even more critical in future.

Our contribution...
The consequence of the situation just described is that designers must keep in mind power when they choose among design alternatives. The most impacting design decisions however are made early in the design cycle and are based on abstract design descriptions.
Software tools to date do not support the direct analysis of such decisions but require a nearly completed design cycle. Because of this several design cycles are often needed to meet power constraints. This is costly in terms of manpower, finances and time. The VLSI Design Department of the University of Oldenburg and the OFFIS Research Institute have made it its goal to develope theoretical foundations as well as practical software tools to support the analysis and reduction of the power consumption of integrated circuits early in the design cycle.

Our Tools...
Let us introduce you to our power tool suite ORINOCO^® (OFFIS Research INstitute pOwer Characterizer, estimator and Optimizer). A first demo version has been introduced to the public at DAC'99. DALE is our behavioral level hardware power estimator. It works on C and SystemC input and provides tight upper and lower bounds for the power consumption. RIO is the tool for characterization and modeling of RT-level components. Itīs main features are the handling of parameterizable models and data dependency. The black box modeling tool BEACH features quasi automatic model generation of blocks such as memories.