Low Power Design Guide

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by Frank Poppen

TABLE OF CONTENTS
1		INTRODUCTION
2		SOURCES OF POWER CONSUMPTION
2.1.		CAPACITIVE SWITCHING ACTIVITY
2.2.		SHORT-CIRCUIT CURRENTS
2.3.		LEAKAGE CURRENTS
2.4.		STATIC POWER
3		LOW POWER DESIGN METHODOLOGIES
3.1.		ADAPTING PROCESS TECHNOLOGY
3.1.1.		Reducing Capacitance
3.1.2.		Reduce Leakage Power
3.1.3.		Reducing Supply Power
3.1.4.		Higher Density of Integration
3.2.		REDUCING SWITCHING ACTIVITY
3.2.1.		Minimization of Glitches
3.2.2.		Minimization of the Number of Operations
3.2.3.		Low Power Bus
3.2.4.		Scheduling and Binding Optimization
3.3.		POWER DOWN MODES
3.3.1.		Power Supply Shutdown
3.3.2.		Clock Gating
3.3.3.		Enabled Flip-Flops
3.3.4.		Memory Partitioning
3.4.		SYSTEM DESIGN
3.4.1.		HW/SW Partitioning
3.4.2.		Integration of Chip Components
4		TECHNIQUES TO MAXIMIZE BATTERY LIFE
5		CONCLUSION
APPENDIX
A		GLOSSARY
B		REGISTER OF ILLUSTRATIONS
C		REGISTER OF EQUATIONS
D		REGISTER OF LITERATURE

Complete Design Guide as PDF.


  1 Introduction

In the early 1970s designing for high speed and minimum area, especially in memories, were the main design constraints. Most of the EDA tools were created to meet these criteria and papers published advertised lower delays and smaller structures. Power consumption was a part of the design process, but was less visible. However, reaching structures below 0.18 mm and having high-performance-chips work in portable devices, power dissipation has become the main design concern in these applications.
This paper addresses designers and will serve as a guideline for system level specifications. One has to accept that it was not possible to summarize the contents of any work done in this working field in this paper and even the carefully selected topics remain superficial. If more information is needed, have a look at the literature listed in appendix D and contact OFFIS. OFFIS is planning to offer a workshop on low power. This web page will show information about this, too. The techniques presented are mainly directed to digital parts of the design. Optimizing software for low power is left out.
The further document is structured as follows: Chapter 2 gives an overview on the sources of power consumption. This basic knowledge often can't be used directly to improve power usage, because the level of abstraction is too low and therefore not in the reach of a common designer who has to design for a given process. Chapter 3 shows up several alternatives for power optimization and chapter 4 is an excursion on batteries and how knowledge about their behavior can improve power supply.

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